Inductive properties of high-performance power distribution grids

The design of high integrity, area efficient power distribution grids has become of practical importance as the portion of on-chip interconnect resources dedicated to power distribution networks in high performance integrated circuits has greatly increased. The inductive characteristics of several types of gridded power distribution networks are described in this paper. The inductance extraction program FastHenry is used to evaluate the inductive properties of grid structured interconnect. In power distribution grids with alternating power and ground lines, the inductance is shown to vary linearly with grid length and inversely linearly with the number of lines in the grid. The inductance is also relatively constant with frequency in these grid structures. These properties permit the efficient estimation of the inductive characteristics of power distribution grids. To optimize the process of allocating on-chip metal resources, inductance/area/resistance tradeoffs in high speed performance distribution grids are explored. Two tradeoff scenarios in power grids with alternating power and ground lines are considered. In the first scenario, the total area occupied by the grid lines is maintained constant and the grid inductance versus grid resistance tradeoff is evaluated as the width of the grid lines varies. In the second scenario, the metal area of the grid is maintained constant and the grid inductance versus grid area tradeoff is investigated. In both cases, the grid inductance increases virtually linearly with line width, rising more then eightfold for a tenfold increase in line width. The grid resistance and grid area, however, decrease relatively slowly with line width. This decrease in grid resistance and area is limited to a factor of two under assumed interconnect characteristics.